ISRO Scientist or Engineer Computer Science 2009

For the following questions answer them individually

The subnet mask for a particular networkis 255.255.31.0 Whichof the following pairs of IP addresses could belong to this network?

The address resolution protocol (ARP) is used for

Whichis the correctdefinition of a valid processtransition in an operating system?

Using larger block size in a fixed block size file system leads to

Whichof the following statements about synchronous and asynchronous 1/0 is NOT true?

Consider three CPU-intensive processes, which require 10,20 and 30 time units and arrive at times 0,2, and 6, respectively. How many context switches are neededif the operating system implements a shortest remaining timefirst scheduling algorithm? Do not count the context switchesat time zero and at the end

Consider a set of 5 processes whose arrival time, CPU time needed and the priority are given below.


(Smaller the number, higher the priority.)
if the CPU scheduling policy is priority scheduling without pre-emption, the average waiting time will be

The range of integers that can be represented by an n-bit 2’s compiement number system is

Consider the following boolean function of four variables $$f(w, x, y, z) = \sum (1, 3, 4, 6, 9, 11, 12, 14)$$, The function is

A certain microprocessor requires 4.5 microseconds to respond to an interrupt. Assuming that the three interrupts $$ I_1, I_2$$ and $$I_3 $$ require the following execution time after the interrupt is recognized :
(i) $$ I_1 $$ requires 25 micro seconds
(ii) $$ I_2 $$ requires 35 microseconds
(iii) $$ I_3 $$ requires 20 microseconds
$$ I_1 $$ has the highest priority and $$ I_3 $$ has the lowest. What is the possible range of time for $$ I_3 $$ to be executed assuming that it may or may not occur simultaneously with other interrupts?

Suppose the numbers 7, 5, 1, 8, 3, 6, 0, 9, 4, 2 are inserted in that order into an initially empty binary search tree. The binary search tree uses the usual ordering on natural numbers. What is the inorder traversal sequenceof the resultant tree?

A data structure is required for storing a set of integers such that each of the following operations can be done in (log n) time, where n is the number of elementsin the set.
1. Deletion of the smallest element.
2. Insertion of an element if it is not already present in the set.
Whichof the following data structures can be used for this purpose?

The following numbers are inserted into an empty binary search tree in the given order: 10, 1, 3, 5, 15, 12, 16. What is the height of the binary search tree (the height is the maximum distance of a leaf node from the root)?

Assume that the operators $$ +, -, \times $$ are left associative and ^ is right associative. The order of precedence (from highest to lowest) is ^, $$ \times , +, -.$$ The postfix expression corresponding to the infix expression $$ a + b \times c - d$$ ^ e ^ f is

Thefive items: A, B, C, D, and E are pushed in a stack, one after the other starting from A. The stack is popped four times and each elementis inserted in a queue. Then two elements are deleted from the queue and pushed back on the stack. Now one item is popped from the stack. The popped item is

The microinstructions stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields: a micro-operation field of 13 bits, a next addressfield (X), and a MUX selectfield (Y). There are 8 status bits in the inputs of the MUX. How manybits are there in the X and fields, and whatis the size of the control memoryin number of words?

Consider a disk pack with 16 surfaces, 128 tracks per surface and 256 sectors pertrack. 512 bytes of data are stores in a bit serial manner ina sector. The capacity of the disk pack and the numberof bits required to specify a particular sector in the disk are respectively

Consider a pipelined processor with the following four stages
IF: Instruction Fetch
ID: Instruction Decode and Operand Fetch
EX: executed
WB: Write Back
The IF, ID and WB stagestake one clock cycle each to complete the operation. The ADD and SUB instructions need 1 clock cycle and the MUL instruction need 3 clock cycles in the EX stage. Operand forwarding is usedin the pipelined processor. What is the number of clock cycles taken to complete the following sequence of instructions?
ADD R2, R1, RO R2 $$\leftarrow$$ R1 + R0
MUL R4, R3, R2 R4 $$\leftarrow$$ R3 * R2
SUB R6, R5, R4 R6 $$\leftarrow$$ R5 - R4

A processorthat has carry, overflow and sign flag bits as part of its program status word (PSW)performsaddition of the following two 2’s complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be

The two numbers given below are multiplied using the Booth’s algorithm.
Multiplicand : 0101 1010 1110 1110
Multiplier: 0111 0111 1011 1101
How manyadditions/Subtractions are required for the multiplication of the above two numbers?

Which of the flowing statements about relative addressing modeis FALSE?

A root $$\alpha$$ of equation f(x) = 0 can be computed to any degree of accuracyif a ‘good’ initial approximation $$ X_0 $$ is chosen for which

Whichof the following statement is correct

The formula $$ \int_{x0}^{xn} y(n) dx \simeq h/2 (y_0 + 2y_1 + ..... + 2y_{n - 1} + y_n) -h/12 ( \triangledown y_n - \triangle y_0) -h/24 (\triangledown^2 y_n + \triangle^2 y_0) -19h/720 (\triangledown^3 y_n - \triangle^3 y_0) $$ ....... is called

The formula $$ P_k = y_0 + k\triangledown y_o + \frac{k(k+1)}{2} \triangledown^2 y_0 + ......+\frac{k...(k + n - 1)}{n!} \triangledown^n y_0 is $$

Consider the following code written in a pass-by-reference language like FORTRAN.
                          Subroutine swap (ix,iy)
                                     it = ix
                           L1:     ix = iy
                           L2:     iy = it
                              end
                              ia = 3
                              ib = 8
                              call swap (ia, ib + 5)
                              print*, ia, ib
                              end
S1: The compiler will generate code to allocate a temporary nameless cell, initialize it to 13, and pass the address of the cell to swap
S2: On execution the code will generate a runtime error on line L1
S3: On execution the code will generate a runtime error on line L2
S4: The program will print 13 and 8
S5: The program will print 13 and -2
         Exactly the following set of statement(s) is correct:

If the mean of a normal frequency distribution of 1000 items is 25 and its standard deviation is 2.5, then its maximum ordinate is

Which of the following scenarios may lead to an irrecoverable error ina database system?

On receiving an interrupt from an I/O device, the CPU

Which of the following is/are true of the auto increment addressing mode?
1. It is useful in creating self relocating code
2. If it is included in an instruction set architecture, then an additional ALU is required for effective address calculation
3. The amount of increment depends on the size of the data item accessed

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