A processorthat has carry, overflow and sign flag bits as part of its program status word (PSW)performsaddition of the following two 2’s complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be

A

1, 1, 0

B

1, 0, 0

C

0, 1, 0

D

1, 0, 1