ISRO Scientist or Engineer Electronics 2020

What would be the maximum operating frequency of Mod-8 counter constructed With JK flip flops, having propagation delay of 8ns?

The following state diagram represents which of the input equation. (Given: $$D_{A} = [A, x, y])$$ (Where $$D_{y}$$, denotes a $$DFF$$ with output A. The x and y are the inputs to the circuit)

Which of the following logic circuits do not have no-change condition?

In VHDL following statement 18 written within a Process, where Clock frequency is 24 MHZ
If (Clock event and clock = ‘1’) then
counter_4 bit < = counter_4 bit + x "1" ;
End if;
The frequency of counter_4 bit (2) will be:

Initial voltage on $$C_{1}$$ capacitor is 3 V in the given circuit. Correct sketch of $$V_{x}$$ as a function of time is .(Threshold voltage $$(V_{th}) = 0.5 V)$$

AnSRAMhasaddresslines from $$A_{0}$$, to $$A_{19}$$ and data width from $$D_{0} to D_{15}$$. Total capacity of the SRAM will be

Which of the following digital integrated circuit cannot eebe used as wired logic connections?

The logic function implemented by following circuit can be represented as

The value of C required for sinusoidal oscillation of Frequency = 2 kHz in the given circuit is

In the given circuit, $$V_{be} = 0.7  V, V_{z} = 5.3  V, \beta = 100 . V_{o}$$ is