Consider a 33 MHz CPU based system. What is the numberof wait states required ifit is interfaced with a 60ns memory? Assume a maximum of 10ns delay for additional circuitry like buffering and decoding.
In the standard IEEE 754 single precision floating point representation,there is 1 bit for sign, 23 bits for fraction and 8 bits for exponent. Whatis the precision in terms of the numberof decimal digits?