A CMOSdigital circuit consumes P watts of dynamic power while operating at 20 MHz clock frequency and 5V supply. Whatwill be its dynamic power consumption if the clock frequency is increased to 40 MHz and supply voltage is decreased to 2.5V?

A

$$\frac{P}{4}$$

B

$$\frac{P}{2}$$

C

$$P$$

D

$$2P$$