Last 7 Months to CAT 2024 🎉 Get upto 65% Off Today on CAT courses. Enroll now
The logic evaluated by the circuit at the output is
$$X\overline{Y} + Y\overline{X}$$
$$\overline{X}\overline{Y} + XY$$
$$(\overline{X + Y})XY$$
$$\overline{X} Y + X \overline{Y} + X + Y$$
Create a FREE account and get:
Quant Based DI
Routes And Networks
Scheduling
Puzzles
Arrangement
Quant Based LR
Special Charts
DI Miscellaneous
Coins and Weights
Data Interpretation Basics
Games and Tournamnents
Table with Missing values
2D & 3D LR
Selection With Condition
Venn Diagrams
Miscellaneous LR
DI with connected data sets
Truth Lie Concept
Charts
Maxima-Minima
Data Interpretation
Data change over a period
Login to your Cracku account.
Follow us on
Incase of any issue contact support@cracku.in
Boost your Prep!