ISRO Scientist or Engineer Electronics 2006

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Instructions

For the following questions answer them individually

Question 11

For the circuit shown in the given figure, the voltage $$V_{AB}$$ is

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Question 12

The equivalent Capacitance across 'ab' will be

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Question 13

The transfer function, $$T(s) = \frac{s}{s + a}$$ is that of a

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Question 14

A particular current is made up of two components: a 10 A dc and a sinusoidal current of peak value of 1.414 A. The average value of the resultant current is

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Question 15

By doubling the sampling frequency

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Question 16

The output voltage ($$v_o$$) of the circuit shown in the given figure is

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Question 17

Assuming that only the X and Y logic inputs are available and their complements $$\overline{X}$$ and $$\overline{Y}$$ are not available, what is the minimum number of two-input NAND gates requires to implement $$X \oplus Y$$

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Question 18

In the given network of AND and OR gates f can be written as:

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Question 19

A Pulse train with a frequency of 1MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is

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Question 20

The A/D converter used in a digital voltmeter could be (1) successive approximation type (2) Flash converter type (3) Dual slope converter type. The correct sequence in the increasing order of their conversion times is

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ISRO Scientist or Engineer Electronics 2006

For the circuit shown in the given figure, the voltage $$V_{AB}$$ is

The equivalent Capacitance across 'ab' will be

The transfer function, $$T(s) = \frac{s}{s + a}$$ is that of a

A particular current is made up of two components: a 10 A dc and a sinusoidal current of peak value of 1.414 A. The average value of the resultant current is

By doubling the sampling frequency

The output voltage ($$v_o$$) of the circuit shown in the given figure is

Assuming that only the X and Y logic inputs are available and their complements $$\overline{X}$$ and $$\overline{Y}$$ are not available, what is the minimum number of two-input NAND gates requires to implement $$X \oplus Y$$

In the given network of AND and OR gates f can be written as:

A Pulse train with a frequency of 1MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is

The A/D converter used in a digital voltmeter could be (1) successive approximation type (2) Flash converter type (3) Dual slope converter type. The correct sequence in the increasing order of their conversion times is

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CAT Quant Questions | CAT Quantitative Ability

CAT DILR Questions | LRDI Questions For CAT

CAT Verbal Ability Questions | VARC Questions For CAT