Login
Register
- Mocks
- Previous Papers
- Learn
- Practice
- Colleges
- Courses
- Enroll To CAT 2024
- Tools
- Offers
- Other Exams
- Blogs
- Adda
For the following questions answer them individually
A cache memory needs an access time of 30 ns and main memory 150 ns, what is the average access time of CPU (assume hit ratio = 80%)?
What is the minimum number of two-input NAND gates used to perform the function of two input OR gate?
If there are n devices (nodes) in a network, what is the number of cable links required for a fully connected mesh and a star topology respectively
Quick, Easy and Effective Revision
By proceeding you agree to create your account
Free CAT Formulae PDF will be sent to your email address soon !!!
