In the circuit shown in the figure, there are two parallel plate capacitors each of capacitance C. The switch $$S_1$$ is pressedfirst to fully charge the capacitor $$C_1$$ and then released. The switch $$S_2$$ is then pressed to charge the capacitor $$C_2$$. After some time, $$S_2$$ is released and then $$S_3$$ is pressed. After sometime,

A

the charge on the upperplate of $$C_1$$ is $$2CV_0$$.

B

the charge on the upperplate of $$C_1$$ is $$CV_0$$

C

the charge on the upperplate of $$C_2$$is 0.

D

the charge on the upper plate of $$C_2$$ is $$CV_0$$.