ISRO Scientist or Engineer Computer Science Dec 2017

Instructions

For the following questions answer them individually

Question 31

In the IPv4 addressing format, the number of networks allowed under Class C addresses is

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Question 32

An Internet Service Provider (ISP) has the following chunk of CIDR-based IP addresses available with it: 245.248.128.0/20. The ISP wants to give half of this chunk of addresses to Organization A, and a quarter to Organization B, while retaining the remaining with itself. Which of the following is a valid allocation of addresses to A and B?

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Question 33

Assume that Source S and Destination D are connected through an intermediate router R. How many times a packet has to visit the network layer and data link layer during a
transmission from S to D?

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Question 34

Generally TCP is reliable and UDP is not reliable. DNS which has to be reliable uses UDP because

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Question 35

Consider the set of activities related to e-mail
A : Send an e-mail from a mail client to mail server
B : Download e-mail headers from mail box and retrieve mails from server to a cache
C : Checking e-mail through a web browser
The application level protocol used for each activity in the same sequence is

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Question 36

Station A uses 32 byte packets to transmit messages to Station B using a sliding window protocol. The round trip time delay between A and B is 40 ms and the bottleneck bandwidth
on the path A and B is 64 kbps. What is the optimal window size that A should use?

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Question 37

A two way set associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The physical address space is 4 GB. The number of bits in the TAG, SET fields are

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Question 38

A CPU has a 32 KB direct mapped cache with 128 byte block size. Suppose A is a 2 dimensional array of size 512  512 with elements that occupy 8 bytes each. Consider the
code segment
for (i =0; i < 512; i++) {
for (j =0; j < 512; j++) {
x += A[i][j];
}
}
Assuming that array is stored in order A[0][0], A[0][1], A[0][2]……, the number of cache misses is

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Question 39

A computer with 32 bit word size uses 2s compliment to represent numbers. The range of integers that can be represented by this computer is

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Question 40

Let M = 11111010 and N = 00001010 be two 8 bit two’s compliment number. Their product in two’s complement is

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