If X and Y are the inputs, the given circuit works as :

The first two gates are NAND gates with their inputs connected together, so they work as NOT gates:

$$X\rightarrow \overline{X}$$

$$Y\rightarrow \overline{Y}$$

The middle gate is a NAND gate. Therefore,

$$Z=\overline{\overline{X}\cdot\overline{Y}}$$

Using De Morgan's theorem,

$$Z=X+Y$$

The final NAND gate also has its two inputs connected together, so it acts as a NOT gate:

$$\text{Output}=\overline{Z}$$

Therefore,

$$\text{Output}=\overline{X+Y}$$

This is the Boolean expression of a NOR gate.

Hence, the answer is NOR gate.