Two 4 bits binary numbers, $$A = 1101$$ and $$B = 1010$$ are given in the inputs of a logic circuit shown in figure below . The output $$(Y)$$ will be :

The input $$A$$ passes through a NOT gate, resulting in $$\overline{A}$$.

 This signal ($$\overline{A}$$) and the input $$B$$ are fed into a NAND gate.

Therefore, the boolean expression for the output $$Y$$ is:

$$ Y = \overline{\overline{A} \cdot B} $$

According to De Morgan's Law, $\overline{X \cdot Y} = \overline{X} + \overline{Y}$. Applying this to our expression:

$$ Y = \overline{\overline{A}} + \overline{B} $$

Since the double complement of a variable is the variable itself ($\overline{\overline{A}} = A$):

$$ Y = A + \overline{B} $$

This means the output $Y$ is the bitwise OR operation of $A$ and the 1's complement of $B$.

Given the inputs:

$$ A = 1101 $$

$$ B = 1010 $$

First, find the 1's complement (bitwise NOT) of $B$:

$$ \overline{B} = 0101 $$

Next, perform the bitwise OR addition ($$+$$) of $$A$$ and $$\overline{B}$$:

Y= 1101